Recently, in the display devices such as liquid crystal display (LCD) utilizing liquid crystalline cells as the display elements for respective pixels, plural pixels are arranged in the form of a matrix, and respective pixels are driven to display image such that the light intensity of each pixel is controlled in accordance with image information representing the image to be displayed. Such driving technique also applies to organic EL displays utilizing organic EL elements as the display elements for pixels.
Moreover, the organic EL displays have advantages over liquid crystal displays such that the organic EL displays have a higher visibility, need no backlighting, and have faster response to signals due to the fact that the organic EL displays are self-luminous using light-emitting elements as the display elements for pixels. The organic EL displays are quite different from liquid crystal displays in that organic EL element is current-controlled type one wherein luminance of each light-emitting element is controlled by the current flowing through it, while liquid crystal cell is voltage-controlled type one.
Like liquid crystal displays, organic EL displays can be driven in a simple (passive) matrix scheme and in an active matrix scheme. The former displays, however, have some difficult problems when used as a large-size high-precision display, though the display is simple in structure. To circumvent the problems, an active matrix control scheme has been developed in which the current flowing through a light-emitting element for each pixel is controlled by an active element, for example, a gate-insulated field effect transistor (typically a thin film transistor, TFT) also provided in the pixel.
FIG. 1 shows a conventional pixel circuit (circuit of a unit pixel) in an active matrix type organic EL display (for more details, see U.S. Pat. No. 5,684,365 and JP-A-H08-234683).
As is shown clearly in FIG. 1, the conventional pixel circuit includes an organic EL element 101 having an anode connected to a positive voltage supply Vdd, a TFT 102 having a drain connected to a cathode of the organic EL element 101 and a grounded source, a capacitor 103 connected between a gate of the TFT 102 and the ground, and a TFT 104 having a drain connected to the gate of the TFT 102, a source connected to a data line 106, and a gate connected to a scanning line 105.
Organic EL elements are often called organic light-emitting diodes (OLED) because they exhibit rectifying effects in many cases. Thus, the organic EL element is shown in FIG. 1 and other Figures as an OLED and indicated by a mark representing a diode. It should be understood, however, that in what follows the organic EL element is not required to have a rectification property.
Operations of the pixel circuit as shown above are as follows. First, the scanning line 105 is brought to a selective potential (a HIGH level in the example shown herein), and the data line 106 is supplied with a writing potential Vw to make the TFT 104 conductive, thereby charging or discharging the capacitor 103 and bringing the gate of the TFT 102 to the writing potential Vw. Next, the scanning line 105 is brought to a non-selective potential (which is a LOW level in this example). This status electrically isolates the scanning line 105 from the TFT 102. However, the gate potential of the TFT 102 is secured by the capacitor 103.
The current flowing through the TFT 102 and OLED 101 will reach a level that corresponds to the gate-source voltage Vgs, which causes the OLED 101 to be lucent with a luminance in accord with the current values thereof. In what follows an operation that transmits luminance information data, provided on the data line 106 by a selection of scanning line 105, into the pixel will be referred to as “writing”. In the pixel circuit as shown in FIG. 1, once potential Vw is written to the OLED 101, such the OLED 101 will be lighted at a constant luminance until the next writing is made.
A plurality of such pixel circuits 111 (which may be simply referred to as pixels) can be arranged in the form of a matrix as shown in FIG. 2 to form an active matrix type display (organic EL display) device, in which the pixels 111 are sequentially selected repeating the writing into the pixels 111 through data lines 114-1–115-m driven by voltage-driving-type data line drive circuit (voltage driver) 114 with scanning lines 112-1–112-n being sequentially selected by a scanning line drive circuit 113. In this example, pixels 111 are arranged in m (columns) by n (rows) matrix. It is a matter of course that in this case, there are m data lines and n scanning lines.
In a simple matrix type display device, each light-emitting element emits light only at the moment it is selected. In contrast, in an active matrix type display device, each light-emitting element can keep on emitting light after completion of the writing thereof. Accordingly, in the active matrix type display device, the peak luminance and peak current of light-emitting elements can be lower as compared with the simple matrix type display device, which is an advantage especially to a large size and/or high-precision display device.
In general, in the active matrix type organic EL display device, TFTs (thin film transistor) formed on a glass substrate are used as active elements. However, amorphous silicon (non-crystalline silicon) and polysilicon (polycrystalline silicon) to be used for forming TFTs have poor crystallizing properties as compared with silicon single crystal. This implies that they have a poor conductivity and controllability, so that TFTs exhibit large fluctuations in characteristics.
Particularly, when a polysilicon TFT is formed on a relatively large glass substrate, in order to circumvent problems caused by thermal deformation of the glass substrate, a laser annealing technique is usually applied to the glass substrate after formation of an amorphous silicon film to crystallize the polysilicon TFT. However, uniform irradiation of laser light over a large area of the glass substrate is difficult, resulting in non-uniform crystallization of polysilicon at various points on the substrate. As a result, threshold value Vth of TFTs formed on the same substrate varies over several hundreds of mV, and at least 1 volt in some cases.
In such cases, if the same potential Vw is written to these pixels, the threshold values Vth will be different from one pixel to another. Consequently, current Ids flowing through the OLED (organic EL element) varies from one pixel to another and can deviate greatly from a desired level. One cannot then anticipate getting a high quality display. This is true not only with the threshold Vth but also with a fluctuation in the mobility μ of carriers in the same manner.
In order to alleviate the problem, the inventors of the present invention have proposed a pixel circuit as shown in FIG. 3 (See JP-A-H11-200843).
As is apparent from FIG. 3, this pixel circuit disclosed in the formerly filed Japanese Patent Application includes an OLED 121 having an anode connected with a positive voltage supply Vdd, a TFT 122 having a drain connected to a cathode of OLED 121 and a source connected to a reference potential or ground line (herein after simply referred to as ground), a capacitor 123 connected between a gate of the TFT 122 and the ground, TFT 124 having a drain connected to the data line 128 and a gate connected to a first scanning line 127A, respectively, a TFT 125 having a drain and a gate connected to a source of TFT 124 and a source connected to the ground, a TFT 126 having a drain connected to the drain and the gate of the TFT 125 and a source connected to the gate of the TFT 122, and a gate connected to the second scanning line 127B.
As shown in FIG. 3, the scanning line 127A is supplied with a timing signal scanA. The second scanning line 127B is supplied with a timing signal scanB. The data line 128 is supplied with an OLED luminance information (data). A current driver CS provides a bias current Iw to the data line 128 in accordance with active current data based on the OLED luminance information.
In the example shown herein, the TFTs 122 and 125 are N channel MOS transistors and the TFTs 124 and 126 are P channel MOS transistors. FIGS. 4A–4D show timing charts for the pixel circuit in operation.
A definite difference between the pixel circuit shown in FIG. 3 and the one shown in FIG. 1 is as follows. In the pixel circuit shown in FIG. 1, luminance data is given to the pixels in the form of voltage, while in the pixel circuit shown in FIG. 3 luminance data is given to the pixels in the form of current. Corresponding operations are as follows.
First, in writing luminance information, scanning lines 127A and 127B shown in FIGS. 4A and 4B are set to the selective status (status of selective potential, for which scanA and scanB are pulled down to LOW levels) and data line 128 is fed with a current Iw as shown in FIG. 4C which corresponds to the OLED luminance information shown in FIG. 4D. The current Iw flows through the TFT 125 via the TFT 124. The gate-source voltage generated in the TFT 125 is set to Vgs. Since the gate and the drain of the TFT 125 are short-circuited, the TFT 125 operates in the saturation region.
Hence, in accordance with a well-known MOS transistor formula, Iw is given byIw=μ1Cox1W1/L1/2(Vgs−Vth1)2  (1)where Vt1 stands for the threshold of TFT 125, μ1 for carrier mobility, Cox1 for gate capacitance per unit area, W1 for channel width, and L1 for channel length.
Denoting the current flowing through the OLED 121 by Idrv, it is seen that the current Idrv is controlled by the TFT 122 connected in series with OLED 121. In the pixel circuit as shown in FIG. 3, since the gate-source voltage of the TFT 122 equals Vgs given by equation (1), Idrv is given byIdrv=μ2Cox2W2/L2/2(Vgs−Vth2)2  (2)assuming that the TFT 122 operates in the saturation region.
Incidentally, it is known that a MOS transistor is generally operable in a saturation region under the following condition|Vds|>|Vgs−Vt|  (3)Parameters appearing in the equations (2) and (3) are the same as in equation (1). Since the TFTs 125 and 122 are closely formed within the pixel, one may consider that practicallyμ1=μ2, Cox1=Cox2, Vth1=Vth2
Then, the following equation may be easily derived from the equations (1) and (2)Idrv/Iw=(W2/W1)/(L2/L1)  (4)
That is, if carrier mobility μ, gate capacity per unit area Cox, and threshold Vth vary within the panel or vary from one panel to another, current Idrv flowing through the OLED 121 is exactly proportional to the writing current Iw, and hence the luminance of the OLED 121 can be precisely controlled. For example, if it is designed that W2=W1 and L2=L1, then Idrv/Iw=1, which means that writing current Iw matches current Idrv that flows through the OLED 121, irrespective of variations in TFT properties.
It is possible to construct an active matrix type display device by arranging pixel circuits as described above and shown in FIG. 3 in the form of a matrix. A configuration example of such display device is shown in FIG. 5.
Referring to FIG. 5, provided to each current-writing type pixel circuit 211 arranged in a m (column) by n (row) matrix on a row by row basis are any of respective first scanning lines 212A-1–212A-n and any of respective second scanning lines 212B-1–212B-n. Further, each first scanning line 212A-1–212A-n is connected to the gate of the TFT 214 of FIG. 3, and each scanning line 212B-1–212B-n is connected to the gate of the TFT 126 of FIG. 3.
A first scanning line drive circuit 213A for driving the scanning lines 212A-1–212A-n is provided to the left of these pixels, and a second scanning line drive circuit 213B for driving the second scanning lines 212B-1–212B-n is provided to the right of the pixels. The first and the second scanning line drive circuits 213A and 213B consists of shift registers. The scanning line drive circuits 213A and 213B are provided with a common vertical start pulse VSP, and with vertical clock pulses VCKA and VCKB, respectively. The vertical clock pulse VCKA is slightly delayed with respect to the vertical clock pulse VCKB by means of a delay circuit 214.
Each of the pixel circuits 211 in each column is also connected to any of respective data lines 215-1–215-m. These data lines 215-1–215-m are connected at one end thereof to a current drive type data line drive circuit (current driver CS) 216. Luminance information is written to the respective pixels by the data line drive circuit 216 through the data lines 215-1–215-m.
Next, operations of the above active matrix type display device will be described. As the vertical start pulses VSP are fed to the first and the second scanning line drive circuit 213A and 213B, respectively, these scanning line drive circuits 213A and 213B begin shift operations upon receipt of the vertical start pulses VSP, sequentially output scanning pulses scanA1–scanAn and scanB1–scanB1n in synchronism with the vertical clock pulses VCKA and VCKB to select scanning lines 212A-1–212A-n, and 212B-1–212B-n in sequence.
On the other hand, the data line drive circuit 216 drives the data lines 215-1–215-m according to current values determined by the luminance information. The current flows through the selected pixels that are connected to each of the scanning lines, to perform the writing operation on a scanning line basis. Each of these pixels starts emission of light with intensity in accord with the current values. It is noted that, as described previously, the vertical clock pulse VCKA is slightly behind the vertical clock pulse VCKB so that the scanning line 127B becomes non-selective ahead of the scanning line 127A, as seen in FIG. 3. At the point the scanning line 127B becomes non-selective, the luminance data is stored in the capacitor 123 within the pixel circuit, thereby maintaining constant luminance until new data is written into next frame.
In a case where a current mirror structure as shown in FIG. 3 is employed for the pixel circuit, a problem arises that the structure involves a larger number of transistors as compared with the one as shown in FIG. 1. That is, in the example shown in FIG. 1, each pixel is formed of two transistors, while, in the example shown in FIG. 3, each pixel requires four transistors.
Furthermore, in actuality, as disclosed in JP-A-11-200843, in many cases, a larger current Iw is needed for writing from data line as compared with the current Idrv flowing through a light-emitting element OLED. The reason for this is as follows. Current flowing through the light emitting element OLED is generally about a few μA even at the peak luminance. Hence, supposing gradation of 64 levels for the pixel, the magnitude of current in the neighborhood of the lowest gradation turns out to be several tens nA, which is however too small to be supplied correctly to the pixel circuit through a data line having a large capacitance.
This problem can be solved for a circuit shown in FIG. 3 by setting the factor (W2/W1)/(L2/L1) to a small value to thereby increase the writing current Iw in accordance with equation (4). To do this, however, it is necessary to make the ratio W1/L1 of TFT 125 large. In that case, since there are many limitations in reducing the channel length L1 as described later, the channel width W1 must be necessarily made larger, which results in a large TFT 125 occupying a large area of the pixel.
In the organic EL displays, when the dimensions of a pixel are generally fixed, this means that the area of light emitting section of the pixel must be reduced. This results in a loss of reliability of the pixel caused by increased current density, increased power consumption due to increased drive voltage, coarse graining of the pixels due to the decrease in the light emitting area, and the like, which prevent reduction of the pixel size, namely, hinders an improvement for a higher resolution.
For example, suppose that writing current on the order of a few μA is preferred in the neighborhood of the lowest level of gradation. Then it is necessary to make the channel width W1 of the TFT 122 as 100 times larger than that of the TFT 122 if L1=L2 is assumed. This is not the case if L1<L2. However, there are limitations on the reduction of the channel length L1 in view of withstand voltage of pixels and design rules.
Particularly in the current mirror constitution as shown in FIG. 3, it is preferred that L1=L2. This is because, considering the fact that the channel length greatly affects threshold value of a transistor, saturation characteristic in the saturation region thereof, and so on, it is advantageous to conform the TFTs 125 and 122 in the current mirror configuration by choosing L1 equal to L2 so that an exact proportional relationship of the current Idrv to the current Iw is established, which makes it possible to provide current of desired magnitude to the light emitting element OLED.
It is inevitable to have some fluctuations in the channel length during the manufacturing process of TFTs. Even then, if in design L1 equals L2 and the TFT 125 and TFT 122 are sufficiently close to each other, substantial equality L1=L2 is guaranteed, should L1 and L2 deviate to some extent. As a result, the value of Idrv/Iw according to the equation (4) remains substantially constant in spite of the fluctuations.
On the other hand, if in design L1<L2, but the actual channel lengths are shorter than the design lengths, then the shorter channel L1 will be more affected relatively than the other, rendering the ratio of L1 to L2 susceptible to the fluctuations during the manufacturing process and hence the ratio Idrv/Iw of equation (4). Consequently, dimensional fluctuations in channel length, if they occur on the same panel, can degrade the uniformity of an image formed.
Furthermore, in the circuit as shown in FIG. 3, it is necessary to made large the channel width of the TFT 124, serving as a switching transistor (hereinafter referred to as scanning transistor in some cases) connecting the data line to the TFT 125, because the writing current Iw flows through the TFT 124. This also causes a large pixel circuit occupying large area.
It is therefore an object of the invention to provide an active matrix type display device, an active matrix type organic EL display device, and methods of driving these display devices when pixel circuits are of writing current type, by realizing small pixel circuits occupying small areas to ensure a high resolution display and by realizing accurate current supply to each light emitting element.